/** Copyright 2019 Haiku, Inc. All rights reserved.* Distributed under the terms of the MIT License.** Authors:* Adam Fowler, adamfowleruk@gmail.com** Corresponds to:* headers/os/add-ins/graphics/Accelerant.h rev 53658*//*!\file Accelerant.h\ingroup graphics\ingroup libbe\brief Defines the structures used by an Accelerant (and \c BScreen).*//*!\name Display mode structs and constants*///! @{/*!\enum display_timing_flags\ingroup graphics\brief Constants for \c display_timing::flags\since BeOS R5*//*!\var display_timing_flags B_BLANK_PEDESTALSpecifies the blank pedestal flag.\since BeOS R5*//*!\var display_timing_flags B_TIMING_INTERLACEDInterlaced mode enabled.\since BeOS R5*//*!\var display_timing_flags B_POSITIVE_HSYNCSpecifies a positive horizontal sync polarity.\since BeOS R5*//*!\var display_timing_flags B_POSITIVE_VSYNCSpecifies a positive vertical sync polarity.\since BeOS R5*//*!\var display_timing_flags B_SYNC_ON_GREENSpecifies that sync on green is used (sometimes called SOG or RGsB)\since BeOS R5*//*!\struct display_timing\brief Provides timing information about a display modesupported by a graphics card.This provides information about the display resolution as well as thevideo timings, allowing to compute the refresh rate in a precise way.The timings are specified in term of horizontal and vertical pixels.The "display" area corresponds to what's actually visible. But there issome extra delay between two consecutive lines or two consecutive frames,which is taked into account by the "total" values. In that area, there isalso the display sycnhronization signals, which start and end at specificpixel numbers as well.*//*!\var uint32 display_timing::pixel_clockPixel clock in kHz.The pixel clock is the frequency at which the display hardware moves fromone pixel to the next.\since BeOS R5*//*!\var uint16 display_timing::h_displayHorizontal display width in pixels.\since BeOS R5*//*!\var uint16 display_timing::h_sync_startHorizontal sync start in pixels.\since BeOS R5*//*!\var uint display_timing::h_sync_endHorizontal sync end in pixels.\since BeOS R5*//*!\var uint16 display_timing::h_totalHorizontal total in pixels.\since BeOS R5*//*!\var uint16 display_timing::v_displayVertical display height in pixels.\since BeOS R5*//*!\var uint16 display:timing::v_sync_startVertical sync start line.\since BeOS R5*//*!\var uint16 display_timing::v_sync_endVertical sync end line.\since BeOS R5*//*!\var uint16 display_timing::v_totalTotal number of vertical lines.\since BeOS R5*//*!\var uint21 display_timing::flagsTiming flags, for sync polarity, interlaced, double scan etc.\since BeOS R5*//*!\enum display_mode_flags\ingroup graphics\brief Constants for \c display_mode:flags\since BeOS R5*//*!\var display_mode_flags B_SCROLLSpecifies scroll supported. Set when the display uses a virtual screen.\since BeOS R5*//*!\var display_mode_flags B_8_BIT_DACSpecifies that the DAC is in 8-bit mode.\since BeOS R5*//*!\var display_mode_flags B_HARDWARE_CURSORSpecifies that a hardware cursor is supported.\since BeOS R5*//*!\var display_mode_flags B_PARALLEL_ACCESSSpecifies that parallel access to the framebuffer is allowed.\since BeOS R5*//*!\var display_mode_flags B_DPMSSpecifies that the Display Power Management System is supported. The screencan be shut down when the computer is idle to save power.\since beOS R5*//*!\var display_mode_flags B_IO_FB_NAIndicates that the video framebuffer is not directly mapped into memory.The driver will handle sending the data to the video card, and applicationsshould not try to write directly to the buffer.This is used only in legacy modes and hardware where a linear framebufferisn't available.\since BeOS R5*//*!\struct display_mode\brief Provides information about a display mode supportedby a graphics card.The display resolution may be set larger than the actual display resolution.In which case, not all pixels are visible at the same time, and scrollingcan be used to move around the larger virtual space. This is indicatedby the B_SCROLL flag.When the virtual and physical resolutions match, B_SCROLL is not set, andboth display_start settings must be set to 0.*//*!\var display_timing display_mode::timingThe display timing of this mode.\since BeOS R5*//*!\var uint32 display_mode::spaceColor space to use (usually B_CMAP8, B_RGB16, or B_RGB32, but other modesare possible depending on the hardware)\since BeOS R5*//*!\var uint16 display_mode::virtual_widthWidth of this mode in pixels.\since BeOS R5*//*!\var uint16 display_mode::virtual_heightHeight of this mode in pixels.\since BeOS R5*//*!\var uint16 display_mode::h_display_startThe left position to start displaying from, used for scrollingin the virtual space.\since BeOS R5*//*!\var uint16 display_mode::v_display_startThe top position to start displaying from, used for scrolling in the virtualspace.\since BeOS R5*//*!\var uint32 display_mode::flags\brief The flags of this mode.Currently no public flags are defined at this level.Some drivers use this for dual head related options.Reserved for future use.\since BeOS R5*/// @}